Efficient methods for dealing with nonlinear elements in MNA solvers

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Hemmar wrote: Fri Jan 27, 2023 4:47 pm
mystran wrote: Thu Jan 26, 2023 10:34 pm That said, be careful with idealized components as sometimes these can lead to circuits (depending on how they are connected) where multiple variables are linearly dependent no matter what. When this happens adding some small parasitic series resistances is usually the easiest thing to do.
Interesting I'll watch out for that, though in this case the full matrix problem can be solved without issues so I don't think it's that. I also tried using unique symbols for resistors R1, R2 rather than R100k R33k in case these somehow exactly cancelled / lead to linear dependencies, but same result.
If you can solve the full matrix, then partial pivoting should be sufficient for LU. It is possible that you cannot choose the "non-linear block" to be minimal and you might have to order some rows into this block even if they have no terms to iterate, but other than that it should always work.

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mystran wrote: Fri Jan 27, 2023 5:19 pm Why is this a clear violation? Take any electronics textbook and they ask you to solve capacitor mazes. It seems reasonable to expect you could also simulate them.
An ideal capacitor connected to a voltage source, as you mentioned earlier, is infinite current. Even with some extra internal resistances occurring in practice, I guess the current will be orders of magnitude higher than the normal operating range of the circuit, therefore I doubt anybody is gonna design such thing in practice on purpose (unless evil intentions ;) ).

With inductors and current sources we have a dual case, leading to theoretically infinite voltage the moment the circuit is turned on. In practice the voltage will be usually limited by the power supply and limitations of the current source, I guess, so the situation might be more tolerable, but I'm not fully sure. It's a bit difficult for me to reason about inductors in fast-transition states. At any rate, I think we also get pretty much out of normal operating range here, so again I'd expect that no one designs such circuits on purpose.

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Z1202 wrote: Fri Jan 27, 2023 6:33 pm
mystran wrote: Fri Jan 27, 2023 5:19 pm Why is this a clear violation? Take any electronics textbook and they ask you to solve capacitor mazes. It seems reasonable to expect you could also simulate them.
An ideal capacitor connected to a voltage source, as you mentioned earlier, is infinite current. Even with some extra internal resistances occurring in practice, I guess the current will be orders of magnitude higher than the normal operating range of the circuit, therefore I doubt anybody is gonna design such thing in practice on purpose (unless evil intentions ;) ).
Oh, I hope you didn't misunderstand my example circuit?

V1 above was not supposed to be a voltage source, it's supposed to just be the node voltage we're trying to solve, the unknown. There is no voltage sources at all in the circuit, just two capacitors connected in series to ground at both sides, which an entirely reasonable (although useless) circuit in physical reality, but it's not necessarily a reasonable circuit for simulation with ideal capacitors: the steady-state has infinitely many solutions.

Perhaps a better way to put it is to state that "every node must have a DC path to ground" (even if the conductance is very low). This might not be a sufficient condition (ie. I think you can have similar issues with current nodes too), but it is necessary. It is a condition that is essentially impossible to violate in physical reality, but it is possible to do this with idealized component models.

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mystran wrote: Fri Jan 27, 2023 10:05 pm Oh, I hope you didn't misunderstand my example circuit?

V1 above was not supposed to be a voltage source, it's supposed to just be the node voltage we're trying to solve, the unknown. There is no voltage sources at all in the circuit, just two capacitors connected in series to ground at both sides, which an entirely reasonable (although useless) circuit in physical reality, but it's not necessarily a reasonable circuit for simulation with ideal capacitors: the steady-state has infinitely many solutions.

Perhaps a better way to put it is to state that "every node must have a DC path to ground" (even if the conductance is very low). This might not be a sufficient condition (ie. I think you can have similar issues with current nodes too), but it is necessary. It is a condition that is essentially impossible to violate in physical reality, but it is possible to do this with idealized component models.
I would still consider your circuit as a particular case of the capacitor-to-voltage-source violation, since in case of voltage mismatch on two capacitors each acts (temporarily) as a voltage source for the other. Actually a second violation of the same restriction is connecting both ends to the ground (treating the two ground connections as a zero voltage source). The counterpart of that is that your circuit makes no practical sense, idealized or not, I hope you agree to that. And this has been my point - I kind of doubt that this kind of circuits can have any practical purpose and therefore one doesn't need to analyse them except for the sake of exercise. But then, I'd question the validity of exercise done on circuits violating the ideal model's limitations and having no practical value either. It's like trying to divide by zero "for the sake of exercise", and complaining that you cannot do that.

(Edit: idealized capacitor is a temporary voltage source. The model doesn't allow to connect two voltage sources to each other - what would you expect to happen? It's like saying "the voltage between these two points is 5V, but it's also 3V at the same time". Do you ever connect voltage sources in parallel? Do you insist that such circuits should be analysable?)

I disagree that your circuit is entirely reasonable in physical reality. It's becoming somewhat physical only with additional information, which always holds in reality: zero initial state. But you can also argue that connecting a capacitor to a voltage source is possible in physical reality and therefore must be analysable. I'm questioning the validity of the latter argument: our idealized model is good for all practical circuits. The fact that some impractical circuits violate the model's limitations is a non-issue IMHO. On the contrary, they allow us to quickly spot mistakes in the circuits.

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mystran wrote: Fri Jan 27, 2023 5:25 pm If you can solve the full matrix, then partial pivoting should be sufficient for LU. It is possible that you cannot choose the "non-linear block" to be minimal and you might have to order some rows into this block even if they have no terms to iterate, but other than that it should always work.
Just to nudge this thread back on track - indeed after a bit of playing around I could find a larger A block that is nonlinear + some other bits, but that ended up being much larger than I would of hoped (A of size 21x21 of the 24x24 full size M). This is the last cell of the linked jupyter notebook: https://gist.github.com/hemmer/e24957a1 ... d6130ac0ba

I will continue playing around, but by-hand is not really practical for larger matrices. My intuition for where the linear independence of submatrices breaks down is not good, so I was fishing around for if there were existing techniques.

Basically looking for something like: "if there are p "nonlinear" pieces in the top left corner of full rank matrix M (n x n), find the permutation so that matrix A (m x m for m >=p) and D (n-m) x (n-m) are full rank". In fact actually only D is need be full rank, it's "(A - B*D^-1*C)" that must be full rank.

The linked notebook only need sympy=1.11 and numpy if anyone wants to have a play.

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