Sorry if I'm being annoying, I but I can't find a mistake in my diode ladder. Transistor one is fine, but with diode I keep getting wrong cut-off (the error is not linear, i.e. wrongCutoff != x * correctCutoff) and quiet output. I'll try to describe what I do precisely.

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```
gf = analogFreq * pi / sampleRate;
Glp = gf / (1 + gf); // LP instant response gain
```

Let Zn be the value of n-th trapezoidal integrator memory. Then

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`sn = zn / (1 + gf); // n-th LP instant response offset`

I must confess I'm not 100% sure about how to treat IR gains from the figure 4.20. Supposedly because of the 1/2 gains on fig. 4.18 all IR gains on fig. 4.20 should be scaled by 1/2 except for the very first one. All IR offsets stay the same.

Now calculate stuff for ZDF, just implement formulae from page 78.

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```
G4 = 0.5 * Glp;
G3 = G4 / (1 - G4 * G4);
G2 = G4 / (1 - G4 * G3);
G1 = Glp / (1 - Glp * G2);
g_den = 1 / (1 + gf);
g_inv = 1 / G4;
// G4 == 0.5 * Glp == g from fig. 4.20
S4 = s4 = z4 * g_den;
S3 = (G4 * S4 + z3 * g_den) * G3 * gInv;
S2 = (G4 * S3 + z2 * g_den) * G2 * gInv;
S1 = (2 * G4 * S2 + z1 * g_den) * G1 * gInv * 0.5;
G = G4;
S = S4 + G * S3;
G *= G3;
S += G * S2;
G *= G2;
S += G * S1;
G *= G1;
```

The diode ladder input then has the same form as that of the transistor ladder,

Next, process the LPs.

For now yn are stored as previous stage outputs. In my delusional opinion this is not the reason for the problem. After fixing it I'd like to make them zero delay too.

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```
v = (u + y2 - z1) * Glp;
y1 = v + z1;
z1 = y1 + v;
v = ((y1 + y3) * 0.5 - z2) * Glp;
y2 = v + z2;
z2 = y2 + v;
v = ((y2 + y4) * 0.5 - z3) * Glp;
y3 = v + z3;
z3 = y3 + v;
v = (0.5 * y3 - z4) * Glp;
y4 = v + z4;
z4 = y4 + v;
```

Here's a comparisson of a filtered sawtooth. In both cases cutoff = 1 kHz, fb set to max (4.0 and 17.0 correspondingly):

Transistor:

Diode: