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gearwatcher
KVRer
29 posts since 24 Aug, 2021

Post Mon Jun 27, 2022 11:55 am

2DaT wrote: Sun Jun 26, 2022 7:13 pm
gearwatcher wrote: Sun Jun 26, 2022 12:35 pm Actually ARMs are, in a way, VLIW processors (although so are the SIMD units in x86 CPUs) capable of decoding and executing some of the instructions in the ISA in parallel (2 or 4 at the same time).
This is wrong use of terminology. Just because x86 and ARM use uops doesn't make it VLIW. Although you can say that between scheduler and execution units it runs "like a" VLIW, schedulers are extremely complicated. Real VLIW is about simple schedulers.

It doesn't really matter all these acronyms (RISC,CISC,SIMD, VLIW, SMT, etc.), unless you actually write code for the platform. For anybody who is not a programmer, it's absolutely meaningless.

End users should compare real performance of real software and not reason about things they don't understand.
I said "in a way", and the discussion became about CPU architecture long before my post.

Having said that, I would argue that for 99% of programmers most of this doesn't matter either as the compilers abstract all of it away. And they should be profiling before optimising prematurely, and taking more care about the explosion of complexity in their code. And even if they are very performance oriented (like DSP software devs should be) structuring memory access for speed should be much higher on their priorities than most of the jargon above.

Yet you can't make developers stop yammering about computer architecture, so why should users be forbidden to?

2DaT
KVRist
492 posts since 21 Jun, 2013

Post Mon Jun 27, 2022 6:06 pm

gearwatcher wrote: Mon Jun 27, 2022 11:55 am Yet you can't make developers stop yammering about computer architecture, so why should users be forbidden to?
Because they come to wrong conclusions.

Not too long ago, I saw a users comment on AVX512: "It has twice as much registers, and they are twice as wide, therefore it's 4x faster at processing data".

See, the premise is correct, but conclusion is totally nuts.

Same with Hyper-threading. Users think it's twice the threads therefore it's twice as fast, where in reality it's a 15% multithread performance boost.

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machinesworking
KVRAF
4504 posts since 15 Aug, 2003 from seattle

Post Mon Jun 27, 2022 9:01 pm

2DaT wrote: Mon Jun 27, 2022 6:06 pm
gearwatcher wrote: Mon Jun 27, 2022 11:55 am Yet you can't make developers stop yammering about computer architecture, so why should users be forbidden to?
Because they come to wrong conclusions.

Not too long ago, I saw a users comment on AVX512: "It has twice as much registers, and they are twice as wide, therefore it's 4x faster at processing data".

See, the premise is correct, but conclusion is totally nuts.

Same with Hyper-threading. Users think it's twice the threads therefore it's twice as fast, where in reality it's a 15% multithread performance boost.
That's the rub of it. What happens when you stack plugins? All of the sales pitch tweaks to tech out more from a chip doesn't mean anything without real world performance.

There are literally people that think Apple Silicon can't be any good because it doesn't use AVX and hyper threading. Conversely there are people that believe because it's "Arm" it's better etc.

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uOpt
KVRist
93 posts since 3 Jan, 2021

Post Tue Jun 28, 2022 8:37 am

Developers don't make use of hyperthreading explicitly. They make the code multithreaded and it gets distributed to cores or hyperthreaded cores by the OS.

Developers very much explicitly make use of SIMD instructions such as AVX.

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