KVR Audio

Halonmusic · Post by **Halonmusic** » Thu Jun 13, 2019 9:54 am

If you are making it? No thanks.

HSum · Post by **HSum** » Thu Jun 13, 2019 11:22 am

Great explanations and documentation. Thanks. Let's see if one day there'll be the perfect emu

aciddose · Post by **aciddose** » Fri Jun 14, 2019 2:34 am

Further "progress" if you'd call it that:

I've decided I'll post the filter schematic even though it's nowhere near accurate. I've been able to muck around with manually entered NMOS models/parameters to get closer to what looks accurate, but it looks like using some of the special features of ltspice for high accuracy will be needed after all. Going transistor-by-transistor to measure and enter all that data is quite a bit of effort.

In the schematic image I've linked here I've tweaked things to produce vastly higher gain than the actual circuit is capable of. This allows self-oscillation and provides some protection against latch-up even when the input is driven to clipping.

I still haven't bothered to model the full audio-path or the voltage controlled resistors as without an accurate amp model finished the complete circuit wouldn't be accurate anyway.

With that taken into consideration it would still be fun to get some sequenced sounds played through the "rough" model. This can be done by providing .wav files of the raw unfiltered input signal and matching envelope.

http://xhip.net/sid/badsid3.mp3
( http://xhip.net/sid/badsid3.flac )

Due to the feedback based gain control the circuits themselves are of course much more linear than you'd expect given the raw transfer curve. In that respect it might be interesting to get the full audio-path set up so the additional mixer/gain stages can further color the timbre. I'll have to see when I get there.

aciddose · Post by **aciddose** » Fri Jun 14, 2019 9:28 am

Here it is running with a clean square input and envelope signal:

http://xhip.net/sid/badsid_seq_1.mp3
( http://xhip.net/sid/badsid_seq_1.flac )

http://xhip.net/sid/badsid_seq_2.mp3
( http://xhip.net/sid/badsid_seq_2.flac )

The input square is a pure digitally generated "perfect" square. 100% of that timbre is coming from the filter circuit. There is no mixer/dac and no amplifier stage applied so this is still lacking the additional distortion from the complete signal path.

The source signals:
http://xhip.net/sid/sq_seq_1.flac
http://xhip.net/sid/sq_seq_1_env.flac

aciddose · Post by **aciddose** » Sun Jun 16, 2019 9:36 am

Examples of the filter tweaked in an attempt to maximize linearity (now includes the whole output signal path):

This is most likely what the designers wanted to produce (250mV):
http://xhip.net/sid/badsid_seq_3.mp3
( http://xhip.net/sid/badsid_seq_3.flac )

As the input gain increases, distortion grows exponentially (500mV):
http://xhip.net/sid/badsid_seq_4.mp3
( http://xhip.net/sid/badsid_seq_4.flac )

Now some bad distortion (1V):
http://xhip.net/sid/badsid_seq_5.mp3
( http://xhip.net/sid/badsid_seq_5.flac )

Until the point where it can't really even "filter" anymore (2V):
http://xhip.net/sid/badsid_seq_6.mp3
( http://xhip.net/sid/badsid_seq_6.flac )

I suspect there are remaining accuracy issues though as interesting as this may be on its own.

This distortion issue is a combination of things. The amplifier design matters (#1) but also the voltage controlled resistors play a very significant part. More modern designs can overcome these problems by using proper opamps and VCRs (full OTAs are used instead) which were beyond what they could do with the SID.

#1: The amplifier design actually contributes more to instability of the filter where it can break into uncontrolled oscillation. This is due to the non-linearity and non-uniform gain. (The gain+linearity is highest in a narrow region around near 4.5V) Outside the linear region the amp can be forced to act more like a switch and once it does it switches rapidly: you're now oscillating out of control. The very limited Q of the SID may in fact be due to avoiding this problem in combination with maximizing noise ratio and "hiding" distortion (making it less noticeable.)

I guess I'll just make this a huge wall of text blog-post. The SID amps also had much lower gain than they needed to operate correctly. This is why for example the signal level drops across each amp (it should be unity) and therefore the "highpass" is actually not getting enough feedback from the lowpass or bandpass feedback paths to actually work. Given proper gain in the amps the filter can nearly self-oscillate with Rfb = 270k. This is why the "highpass" output is actually a mixture of the input with the highpass: the low part hasn't been subtracted away entirely. This also means the bandpass is not actually an equal band but "mostly lowpass, slightly highpass", a severely tilted band.

Part of the reason for the low gain was that it was done intentionally (#2) due to severe variability in NMOS transistor gain. This is why individual chips in the same run as well as different runs and revisions have such radically different gains (and therefore distortion, Q, cutoff range, amplitude, clipping, high/band-pass quality, etc.)

#2: Since having the gain "too high" can force the circuit into out of control oscillation, the amp had to be designed given the "ideal maximum" transistor gain to have a gain slightly below the critical point where it would become unstable. At that point the average is now way lower and the minimum gain point is so low you'd barely get any Q and your high-pass doesn't really work at all anymore. Whole runs of chips were produced with transistors that had much lower than expected gains and therefore dysfunctional filters.

When maximizing gain it makes the circuit more likely to become unstable and switch into uncontrolled oscillation. This is the meaning when I said the amp design is "very finicky". It's like you go in the living room and move a sofa 1" and the whole house explodes.

The source signals:
http://xhip.net/sid/cfunk_osc.flac
http://xhip.net/sid/cfunk_env.flac

EvilDragon · Post by **EvilDragon** » Sun Jun 16, 2019 6:56 pm

Very interesting findings!

aciddose · Post by **aciddose** » Sun Jun 23, 2019 12:32 pm

Here's a "fixed" (partly) version of the sidamp sub-circuit.

Schematic: http://xhip.net/sid/sidamp_r1.asc (for subcircuit application)
http://xhip.net/sid/sidamp_r1_standalone.asc (for standalone testing)
Netlist: http://xhip.net/sid/sidamp_r1.net
Symbol: http://xhip.net/sid/sidamp_r1.asy

Pastebin for historical conservation: (alternate host for the files, it's too spam-like to post on the forum directly, sorry!)
https://pastebin.com/stiTqsLm

This seems to produce "fair" accuracy in that the output of the amplifier looks correct and the ranges roughly match what I've seen published.

Roughly, except:

The range is 1.1v to 12v, not 0.8v to 10.8v
The center point is 4.79v, not 4.5v

These can be corrected by adjusting the NMOS transistor parameters though! I've used length=10, width=100 as a starting point. If for example you change the input buffer (M1) to length=5, the zero point becomes 4.53v instead.

The exact curvature of the output depends upon the gain of both the feedback amplifier (M2) and the buffer (M1) as well as the amplifier (M3) and supply (M4). The offset also depends upon the balance between M1&2 and M3&4, so these things are not independently adjustable.

I don't know enough to say whether it's even possible to accurately measure these properties from the chip scans and set up a model of the transistors that produces accurate results. I also don't know if I have the circuit set up correctly: (Does the substrate always connect to the source? Is the resistance only part of the source or is some applied at the drain? Do I even have drain/source in the right order? Do other missing properties have any important influence such as substrate resistance?)

That all said... that's an issue for reaching "perfect" while it already works well enough as-is.

I'd like to tweak and improve my filter schematic a bit more and I'll publish that as well.

edit: copy-paste error
edit2: updated schematic/symbol links

aciddose · Post by **aciddose** » Sun Jun 23, 2019 12:42 pm

I get better results with the ratio: M = length/width
M1 = 2/10
M2 = 1/10
M3 = 2/10
M4 = 10/10

This places the zero point at 4.515v, the negative at 0.782v and positive at 11.992v

So this leaves the problem of exactly what limits the positive range to less than 12v... I don't understand yet how it could be forced to be limited to 10.8v or similar. I would assume this could be due to the "diode drop" which for NMOS should be the GS voltage... but I don't know enough to work out exactly how to get that effect in an accurate way.

It may also be that the reported range is affected by the other parts of the filter circuit. That would depend upon how much the gain and GS threshold of the transistors is affected by factors like temperature and current.

Someone who knows more about electronics could probably whip up a solution in five seconds. "No you dummy, it works like this ... !"

aciddose · Post by **aciddose** » Sun Jun 23, 2019 5:07 pm

It's likely they only meant "in normal operation the min/max range is ..."

Since the range of one amp is ~1v to 12v it means two or more amps in series will limit the range.

A 1v input on the graph above would give 11.5v output. An 11.5v input would produce 1.1v output. So there you go. In the trimmed circuit with ~0.8v to 12v range the numbers work out as 0.783v = 10.6v.

So that would explain away that issue as lack of detail in the description. They didn't actually measure the amplifier transfer curve by measuring the output from a curve-tracer input (arbitrary voltages) but rather they looked at the min/max voltage the circuit generates on its own.

So the actual transfer curve is what we see plotted in simulation: the low point depends on the transistor characteristics while the high point is always approximately 12v.

aciddose · Post by **aciddose** » Mon Jun 24, 2019 9:31 am

Here's your basic amp test circuit confirming that:

http://xhip.net/sid/sidamp_r1_series_test.asc

The actual amplitude between stages is at best -4 dB with 10 meg resistors. Lower values like 100k feedback give near -4.2 dB because the output is not buffered (it's between 4.2k and 220 ohm) so the current supplied isn't high enough to maintain feedback. Since the amplifier is not supplied by a constant-current-source it means the amplification is much lower than would otherwise be possible... in a proper amp you'd expect at least 20x more amplitude. Here you can see the gain between 4v and 5v is approximately 5 (the image in the previous post "out" from the single amp crosses in 1/5th the space as the input.)

The steeper point at about 3.6v input doesn't count as amplification because it's nowhere near linear. It's the exponential point where the input passes the VGS threshold... so technically the M2 transistor is switching on/off, it isn't in the linear region.

aciddose · Post by **aciddose** » Mon Jun 24, 2019 11:33 pm

Filter schematic:
http://xhip.net/sid/sid_filter_r1.asc

Summer sub-circuit and symbol:
http://xhip.net/sid/sum.asc
http://xhip.net/sid/sum.asy

Pastebin backups:
https://pastebin.com/MGj0hwie

Here it is an an archived folder for ease-of-use:
http://xhip.net/sid/sid_filter_ltspice.7z

Some things to note when running the filter:

The non-uniform gain means the offset point of the input signal (~6v) determines the resonance amount.
The amplitude envelope is applied before input so level will always be less than 6vpp.
The gain of the sidamps depends upon transistor properties... resistances are likely accurate but higher gain is required to get "typical" sid timbres.
The "VCR" transistors perform differently with different properties too.
To be as accurate as possible the full parameters for every transistor still need to be filled out (includes capacitance,)

... that pretty much sums it up though. This is an accurate model that reproduces the full range of effects that you get from a real-life MOS 6581 SID from the filter onward.

Further work could be aimed at modelling the input signal accurately... for example I haven't researched the exact effects of the amplitude envelope so I can't say exactly what offsets or voltage ranges show up at the inputs.

The important thing however is that it's now possible to look at exactly what the output is, exactly what causes various elements of the timbre and variations and compare directly to any software model to gauge accuracy without relying on biased subjective "by ear" assessments. Hopefully this should enable anyone with the desire to produce an extremely accurate parameterized model that can cover variations in different sets of 6581 chips.

Let's build a "perfect" MOS SID (6581)