Roland Alpha Juno-2 pwm sawtooth

[aciddose]

The DCO is right there, the OUT0 to 5 output continuous analog voltages.

How do you explain that?

I have modeled the Juno oscillators both in software and hardware.

Here is the Juno DCO modeled in FPGA.
100% digital.

Juno FPGA OSC.jpg

Again, the DCO is right there, the OUT0 to 5 output continuous analog voltages.

How do you explain that?

If the output were PWM based, differentiation of the signal would reveal the PWM pulses. There are no such pulses on the output.

How do you explain that?

Also, the filter on the output is a highpass filter, not lowpass. The signal on the pin while floating is continuous analog. Is your argument that the analog integrators for the PWM circuitry exist inside the DCO IC?

[janostman]

You can see this in the image I posted of the PCB. There is the single DCO chip, you can see the top-side traces leading from OUT0-5 to each of the electrolytic capacitors which provide CR highpass filters + dividers before input to the IR3R05.

Wrong.
It's not a HPF, its a DC blocking to make the filter see an AC-signal from the digital block.

The DCO chip outputs a digital signal.

[janostman]

You are so into analog thinking that you refuse to see that phase shifting and mixed frequencies in digital can give an analog signal?

Did you know that 2 detuned sqrwaves are actually a saw pwm?

I think you have a lot to learn.

[aciddose]

So you don't understand what a highpass filter is then?

How do you come up with the claim the DCO outputs a "digital" signal? Can you define this for us?

Do you mean it outputs only true/false values sync'd to the clock input?

The values are indeed sync'd, but they are not true/false. They are continuous analog voltages integrated by a capacitor inside the DCO IC.

Now let's get back to business here. Is your argument that this "PWM generator" contains the integrator inside the IC?

[janostman]

So you don't understand what a highpass filter is then?

How do you come up with the claim the DCO outputs a "digital" signal? Can you define this for us?

Do you mean it outputs only true/false values sync'd to the clock input?

The values are indeed sync'd, but they are not true/false. They are continuous analog voltages integrated by a capacitor inside the DCO IC.

Now let's get back to business here. Is your argument that this "PWM generator" contains the integrator inside the IC?

Yes, it contains the integrator like my FPGA did.
Even the custom chip in the Juno-106 contains the integrator.

No, there is no PWM involved if you mean PWM like in generating analog levels.

Yes, it contains the integrator to make a saw waveform from a pulse waveform.
In that sense you are right, the output is analog.

But it's manipulated entirely in the digital domain.

[aciddose]

No, it is not manipulated in the digital domain. Once an integrator is involved the remaining circuit is 100% analog, as it operates on a continuously variable analog voltage.

You are failing to differentiate between time quantization and amplitude quantization. These are two entirely separate axes and one can be digital while the other is not.

I am in fact entirely willing to accept that the ramp generating portion of the IC may indeed be PWM based, feeding pulses to be integrated rather than integrating a constant current which is then reset by a single pulse.

The problem however with a PWM implementation is that you can't tune such a circuit as accurately. Indeed, the tuning quality of the circuit is worse at higher frequencies than low as we are operating by dividing a fixed clock frequency.

If we needed to manipulate the clock frequency in order to adjust the space between pulses with accuracy required to provide the quality of tuning control that the system does indeed demonstrate, we would need far more bits of control and far higher frequency clock input than the system has.

[aciddose]

The time axis however is entirely defined by the single clock input to the chip, give or take some propagation delay due to the internal control circuits. So you can say that the signal is both digital and analog, in that the voltage is continuously variable while the phase is always locked in sync to the clock input.

As for whether a theoretically highly-accurate PWM circuit could generate the chopped ramp waveforms, this is doubtful. This would require extremely accurate control of pulse amplitude in order to allow the integrator to be pulsed with exactly the correct amount of current to zero the waveform, then to bring it back up after the chopped section to the position at which it would have been had it been continuously integrated.

Such a circuit may be possible, but a working implementation would be anything but practical.

Instead, it seems far more likely the waveforms after being generated by analog integration are chopped using single transistors before being mixed to the output. There is no circuit available which could be constructed with fewer components or lesser complexity, period.

The PWM idea is very interesting... The justification would be that the integration capacitor could be much smaller, which would save a considerable amount of die space. I believe though that the extraordinary complexity required to produce the same output using a PWM circuit would be of far greater size than the capacitor, and far more complex and therefore expensive.

[aciddose]

In addition to that, I have further evidence to support that a chopper circuit is applied to the analog ramp.

I'll post photos demonstrating the pulses left in the "blank" areas of the chopped waveforms due to propagation delay a little later.

I will note regarding the PWM idea, the signal does carry a significant amount of what appears to be feed-through of the master clock input. These pulses are indeed integrated... however they are bipolar rather than unipolar. Most likely a small amount of leakage current is input to the integrator for the ramp waveform from the clock.

This seems likely, as the time/width of the pulses does not change with regard to the frequency of the ramp itself.

[janostman]

I think the DCOs have at least 16bit (more like 24bit) accuracy.
If you reset an integrator with a pulse wave you have a ramp wave.

if you do manipulation mid cycle and change it's position you have a saw pwm.
Very easy, even with mid 80's electronics.

That is exactly what offset does with a ramp wave on the JP-8000 and what I meant from start.

[antto]

what ramp has offset on the JP-8000?
are you talking about Roland JP-8000? the only thing there that has "offset" is the trianglemod

as for the "pwm sawtooth" as far as i understand it's this:

[aciddose]

That isn't possible though and I've explained why.

If you have only a single integrator, lets say you are moving at 1/4 per step...

0v,
1/4v,
1/2v,
3/4v,

Now, we want to chop the signal by a square at 1 octave higher frequency:

0v -> 1/4v

At this edge, the voltage immediately drops:

1/4v -> 0v

Now we remain zero until the end of the pulse, where the voltage would have otherwise reached 1/2v.

Suddenly, the voltage again immediately rises from 0v to 1/2v.

How can you implement this without a chopper?

[aciddose]

Very easy, even with mid 80's electronics.

Design a circuit capable of this and post it. This will be proof it is possible.

Then you can convince us, engineers at Roland used this method rather than a single resistor and single ed:transistor chopper.

* edit: transistor, not capacitor

[janostman]

the triangle waveform is a dual ramp.
What happens when you "wrap" it around the sign?
It becomes a saw waveform, simple math.

Drop your analog thinking.
If you want to drop an integrated ramp to zero mid-cycle, just buffer it and you can short it when ever you like without disrupting the ramp?

[aciddose]

Here is an example of a chopper circuit.

You see the part that says "ramp on/off", pin 17? This is the input to a chopper.

The chopper is formed by the transistor and the resistor carrying the ramp.

If you replace the "ramp on/off" switch voltage with a pulse at 2x frequency, you get the waveform available from the aJU DCO.

My argument is, this is exactly how it is produced.

The only questions left are how the 2x pwm and other signals are produced. Is the 2x pwm created with a 2nd integrator fed by a pulse at 2x frequency and 1/2 the capacitor? I don't know, but I also don't really care. Interesting but entirely inconsequential.

[aciddose]

If you want to drop an integrated ramp to zero mid-cycle, just buffer it and you can short it when ever you like without disrupting the ramp?

That is called a chopper.